Photonic Sampler

The Photonic Sampler is the key element of the Photonic ADC and Photonic DAC subsystems, capable of down/up-converting high bandwidth signals without electronic mixing hardware or intermediate frequency stages. It consists of a carrier based on dual PIC: dual modulator and photodiode array.

aXenic has in-depth and unique capability in high-speed Mach Zehnder Interferometer (MZI) modulators using the GaAs/AlGaAs material system. The environmental credentials of the GaAs/AlGaAs III-V semiconductor material system are well known. It has many desirable properties for RF devices which must survive and operate in harsh environments and has remained the material of choice for mm-wave electronics and MMICs.

During the PhLEXSAT project aXenic will design and fabricate a compact, dual MZI PIC with high bandwidth (55+ GHz) for integration into the photonic sampler.

The photodetector PIC will operate as a down-converter for converting the optical signal of the photonic ADC and DAC into the electrical domain. Key features of the photodetector PIC are the monolithically to waveguides integrated photodiodes, providing a high linearity and therefore minimizing distortions of the generated RF-signal.

Photonic ADC

The Photonic ADC subsystem capable of down-converting and digitize a band pass signal up to V-band. It consists of a multi-carrier package with two RF input interfaces, one optical input for the optical clock, a photonic sampler, two broadband Trans-Impedance Amplifiers (TIA) and quantizers, high-speed output pins for the digital signal output and low-speed I/O ports for telemetry and control. The development includes the design of the electronic circuitry including MZI bias control and clock recovery which is implemented outside the package via the I/O TM/TC ports. Thanks to the functional and environmental tests at component and module level, the Photonic ADC unit will be TRL 5.

Photonic DAC

The Photonic DAC subsystem capable of converting to analogue and up-converting a band pass signal up to Q-band. It consists of a multi-carrier package with two RF output interfaces, one optical input for the optical clock, a photonic sampler, two electronic DAC, high-speed input pins for the digital signal input and low-speed I/O ports for telemetry and control. The development includes the design of the electronic circuitry including MZI bias control and clock recovery which is implemented outside the package via the I/O TM/TC ports. Thanks to the functional and environmental tests at component and module level, the Photonic DAC unit will be TRL 5.

Photonic clock

A mode-locked laser will be developed that will act as a frequency clock in the system to drive the photonic sampler within the Photonic ADC and Photonic DAC. Key features of the Photonic clock are the sub-picosecond pulses together with the rigid mechanical cavity implementation, enabling ultra-low phase noise and timing jitter, which guarantees a very precise sampling of the signals. The Photonic Clock will be based on current DAS developments and consists of photonic components as well as the control electronics. The current design will be adapted to the requirements imposed by the PhLEXSAT scenario. Thanks to the functional and environmental tests at component and module level, the Photonic Clock unit will be TRL 5.

Digital processing firmware

The on-board processor is divided in three major blocks: (1) Receiving Digital Channelizer (RxDC), (2) Space router and (3) Transmitting Digital Multiplexer (TxDM). All the modules of the firmware are running in high-speed FPGAs.

In the RxDC module, the digital signal from the ADC is processed by some post-processing algorithms to compensate the non-linearities of the photonic sampler. Subsequently, a filtering stage separates the different input channels. The filtered channels are digitally down-converted to a common digital IF and are directed to the space router.

The space router is devoted to route any incoming digital channel to a specific output, which can be re-programmed. The output of the Space Router section consists of a parallel set of outputs grouped to specific transmitter, which include Mx channels (being x the output port) and are routed to the TxDM module.

In the TxDM module, all the channels routed to a specific user are digitally up-converted and multiplexed in order to feed the DAC with the already digitally generated IF signal. The digitally generated multiplex is pre-processed before entering the DAC for pre-linearization.

• Reporting for period 1